A compact and high performance SC DC/DC buck converter
| dc.contributor.author | Baek, CJ | |
| dc.contributor.author | Kumarawadu, S | |
| dc.date.accessioned | 2013-10-21T02:12:33Z | |
| dc.date.available | 2013-10-21T02:12:33Z | |
| dc.date.issued | 2008 | |
| dc.date.issued | 2008 | |
| dc.description.abstract | A novel paralleling interleaved discharging (PID) approach is presented to reduce the output ripple and continuous input current waveform in step-down switched capacitor (SC). Theoretical analysis and the computer simulation show that PID method can reduce output ripple by a factor of three and improve output power level by 8. 7%. The PID method can provide a large range of constant desired values of the output voltage for a given input voltage by paralleling. | |
| dc.identifier.conference | Research for Industry | |
| dc.identifier.pgnos | 86-88 | |
| dc.identifier.place | Faculty of Engineering, University of Moratuwa | |
| dc.identifier.proceeding | 14th Annual Symposium on Research and Industry | |
| dc.identifier.uri | http://dl.lib.mrt.ac.lk/handle/123/8135 | |
| dc.identifier.year | 2008 | |
| dc.language | en | |
| dc.title | A compact and high performance SC DC/DC buck converter | |
| dc.type | Conference-Abstract |