ERU - 2011

Permanent URI for this collectionhttp://192.248.9.226/handle/123/14688

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Browsing ERU - 2011 by Author "Chandrapala, T"

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    item: Conference-Abstract
    Hardware implementation of motion blur removal
    (2011) Chandrapala, T; Cabral, A; Sameera, T; Ahangama, S; Samarawickrama, J
    Motion Blur due to the relative motion between the camera and object can seriously degrade image quality. We present an FPGA based blur detection and correction algorithm which is implemented on lop of a configurable soft-processor based architecture. The system consists of two main modules. The blur detection module identifies the blur length and angle, and the restoration module uses regularized inverse filtering to remove the blur. The Processing algorithms are implemented as separate cores on the FPGA fabric where the soft processor core is only used for managing system configuration. The system can achieve a frame rate of 15fps for a 720p HD video strea
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    item: Conference-Abstract
    Real time stereo vision based on biologically motivated algorithms using GPU
    (2011) Chandrapala, T; Samarawickrama, J
    Although many recent stereo vision algorithms have been able to create disparity maps with high accuracy, because of the sequential nature it is difficult to adopt them for real time applications. Biologically motivated algorithms involving Gabor filters demonstrate inherent parallelism and could be effectively implemented in parallel hardware such as Graphics Processing Units(GPUs). We present a real time stereo vision algorithm based on Gabor filters which effectively use the memory hierarchy and the threading resources of the Graphics Processing Unit(GPU). Since the 2D filtering process is a critical activity which takes upto 50% of the total time to create the disparity map, we evaluate the GPU implementation of three filtering methods. Using the optimal filtering method out of them, we were able to achieve a frame rate of 76 fps for a 512x512 image stream on a NVIDIA GTX 480 GPU, and a I70x speed-up compared to the conventional CPU based implementation.